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 MC100LVEL90 -3.3V / -5V Triple ECL Input to LVPECL Output Translator
Description
The MC100LVEL90 is a triple ECL to LVPECL translator. The device receives either -3.3 V or -5 V differential ECL signals, determined by the VEE supply level, and translates them to +3.3 V differential LVPECL output signals. To accomplish the level translation, the LVEL90 requires three power rails. The VCC supply should be connected to the positive supply, and the VEE pin should be connected to the negative power supply. The GND pins, as expected, are connected to the system ground plane. Both VEE and VCC should be bypassed to ground via 0.01 mF capacitors. Under open input conditions, the D input will be biased at VEE/2 and the D input will be pulled to VEE. This condition will force the Q output to a LOW, ensuring stability. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.
Features
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SO-20 WB DW SUFFIX CASE 751D
MARKING DIAGRAM*
* * * *
500 ps Propagation Delays ESD Protection: >2 kV HBM, >200 V MM The 100 Series Contains Temperature Compensation Operating Range: VCC = 3.0 V to 3.8 V; VEE = -3.0 V to -5.5 V; GND = 0 V Internal Input Pulldown Resistors
20 100LVEL90 AWLYYWWG
* * Q Output will Default LOW with Inputs Open or at VEE * Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test * Moisture Sensitivity;
1 A WL YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
*
* * Pb-Free Packages are Available*
Pb Pkg Level 1, Pb-Free Pkg Level 3 For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V-0 @ 0.125 in, Oxygen Index: 28 to 34 Transistor Count = 261 devices
*For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2006
November, 2006 - Rev. 11
1
Publication Order Number: MC100LVEL90/D
MC100LVEL90
VCC 20 LVPECL Q0 19 Q0 18 GND Q1 17 LVPECL 16 Q1 GND 15 14 LVPECL Q2 13 Q2 12 VCC 11
Table 1. PIN DESCRIPTION
PIN Dn, Dn Qn, Qn ECL VBB VCC VEE GND FUNCTION ECL Inputs LVPECL Outputs ECL Reference Voltage Output Positive Supply Negative Supply Ground
ECL
ECL
ECL
1 VCC
2 D0
3 D0
4 ECL VBB
5 D1
6 D1
7 ECL VBB
8 D2
9 D2
10 VEE
* All VCC pins are tied together on the die. Warning: All VCC, VEE, and GND pins must be externally connected to Power Supply to guarantee proper operation.
Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View)
Table 2. MAXIMUM RATINGS
Symbol VCC VEE VI Iout IBB TA Tstg qJA qJC Tsol Parameter PECL Power Supply NECL Power Supply NECL Mode Input Voltage Output Current ECL VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder 0 lfpm 500 lfpm Standard Board 20 SOIC 20 SOIC 20 SOIC Condition 1 GND = 0 V GND = 0 V GND = 0 V Continuous Surge VI w VEE Condition 2 Rating 8 to 0 -8 to 0 -6 to 0 50 100 0.5 -40 to +85 -65 to +150 90 60 30 to 35 265 Unit V V V mA mA mA C C C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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MC100LVEL90
Table 3. NECL INPUT DC CHARACTERISTICS VCC= 3.3 V; VEE= -3.3 V; GND= 0 V (Note 1)
-40C Symbol IEE VIH VIL ECL VBB VIHCMR Characteristic VEE Power Supply Current Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 2) Vpp < 500 mV Vpp y 500 mV Input HIGH Current Input LOW Current D D 0.5 -600 -1165 -1810 -1.38 Min Typ Max 8.0 -880 -1475 -1.26 -1165 -1810 -1.38 Min 25C Typ 6.0 Max 8.0 -880 -1475 -1.26 -1165 -1810 -1.38 Min 85C Typ Max 8.0 -880 -1475 -1.26 Unit mA mV mV V
VEE+1.3 VEE+1.5
-0.4 -0.4 150
VEE+1.2 VEE+1.4
-0.4 -0.4 150
VEE+1.2 VEE+1.4
-0.4 -0.4 150
V V mA mA
IIH IIL
0.5 -600
0.5 -600
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input parameters vary 1:1 with GND. VEE can vary -3.0 V to -5.5 V. 2. VIHCMR min varies 1:1 with VEE. VIHCMR max varies 1:1 with GND.
Table 4. LVPECL OUTPUT DC CHARACTERISTICS VCC= 3.3 V; VEE= -3.3 V; GND= 0 V (Note 3)
-40C Symbol ICC VOH VOL Characteristic VCC Power Supply Current Output HIGH Voltage (Note 4) Output LOW Voltage (Note 4) 2215 1470 2295 1605 Min Typ Max 24 2420 1745 2275 1490 Min 25C Typ 20 2345 1600 Max 24 2420 1680 2275 1490 2345 1595 Min 85C Typ Max 26 2420 1680 Unit mA mV mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Output parameters vary 1:1 with VCC. VCC can vary +0.5 V / -0.3 V. VEE can vary -3.0 V to -5.5 V. 4. Outputs are terminated through a 50 W resistor to VCC-2 volts.
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MC100LVEL90
Table 5. AC CHARACTERISTICS VCC = 3.0 V to 3.8 V; VEE= -3.0 V to -5.5 V; GND = 0 V
-40C Symbol fmax tPLH tPHL tSKEW Characteristic Maximum Toggle Frequency Propagation Delay D to Q Skew Diff S.E. 390 340 20 25 TBD 150 1000 150 Min Typ 560 590 640 100 200 420 370 20 25 TBD 1000 150 Max Min 25C Typ 650 620 670 100 200 460 410 20 25 TBD 1000 Max Min 85C Typ 700 660 710 100 200 Max Unit MHz ps ps
Output-to-Output (Note 5) Part-to-Part (Diff) (Note 5) Duty Cycle (Diff) (Note 6)
tJITTER VPP tr tf
Random Clock Jitter Input Voltage Swing (Differential Configuration) (Note 7) Output Rise/Fall Times Q (20% - 80%)
ps mV ps
230
500
230
500
230
500
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Skews are valid across specified voltage range, part-to-part skew is for a given temperature. 6. Duty cycle skew is the difference between a TPLH and TPHL propagation delay through a device. 7. VPP(min) is swing measured single-ended on each input in differential configuration. The device has a DC gain of 40.
Q Driver Device Q
Zo = 50 W
D Receiver Device
Zo = 50 W 50 W 50 W
D
VTT VTT = VCC - 2.0 V
Figure 2. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
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MC100LVEL90
ORDERING INFORMATION
Device MC100LVEL90DW MC100LVEL90DWG MC100LVEL90DWR2 MC100LVEL90DWR2G Package SOIC-20 SOIC-20 (Pb-Free) SOIC-20 SOIC-20 (Pb-Free) Package 38 Units / Rail 38 Units / Rail 1000 / Tape & Reel 1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPS I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC100LVEL90
PACKAGE DIMENSIONS
SO-20 WB DW SUFFIX CASE 751D-05 ISSUE G
D
A
11 X 45 _
q
NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_
H
M
B
M
20
10X
0.25
E
1 10
20X
B 0.25
M
B TA
S
B
S
A e
SEATING PLANE
h
18X
A1
T
C
ECLinPS are registered trademarks of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
L
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MC100LVEL90/D


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